A Framework for Automated Hw/Sw Co-Verification of Systemc Designs Using Timed A

Description: A Framework for Automated Hw/Sw Co-Verification of Systemc Designs Using Timed Automata by Paula Herber In this dissertation, we present a systematic, comprehensive, and formally founded quality assurance process, which allows automated co-verification of digital hardware/software systems that are modeled in SystemC. The main idea is to apply model checking to verify that an abstract design meets a requirements specification and to generate conformance tests to check whether refined designs conform to this abstract design. As formal foundation, we define a formal semantics of SystemC by a transformation into the well-defined semantics of UPPAAL timed automata. The automatically generated timed automata model can be verified using the UPPAAL model checker and it can be used to generate conformance tests. With that, we obtain guarantees about liveness, safety, and timing properties of the abstract design, which serves as a specification, and we can ensure the consistency of each refined design to that. The result is a HW/SW co-verification flow that supports the HW/SW co-development process continuously from abstract design down to the implementation.The complete verification flow is implemented in our Framework for the Verification of SystemC designs using Timed Automata (VeriSTA) and its applicability and performance are shown by experimental results. FORMAT Paperback LANGUAGE English CONDITION Brand New Long Description In this dissertation, we present a systematic, comprehensive, and formally founded quality assurance process, which allows automated co-verification of digital hardware/software systems that are modeled in SystemC. The main idea is to apply model checking to verify that an abstract design meets a requirements specification and to generate conformance tests to check whether refined designs conform to this abstract design. As formal foundation, we define a formal semantics of SystemC by a transformation into the well-defined semantics of UPPAAL timed automata. The automatically generated timed automata model can be verified using the UPPAAL model checker and it can be used to generate conformance tests. With that, we obtain guarantees about liveness, safety, and timing properties of the abstract design, which serves as a specification, and we can ensure the consistency of each refined design to that. The result is a HW/SW co-verification flow that supports the HW/SW co-development process continuously from abstract design down to the implementation. The complete verification flow is implemented in our Framework for the Verification of SystemC designs using Timed Automata (VeriSTA) and its applicability and performance are shown by experimental results. Details ISBN3832525114 Author Paula Herber Short Title FRAMEWORK FOR AUTOMATED HW/SW Pages 145 Language English ISBN-10 3832525114 ISBN-13 9783832525118 Media Book Format Paperback Year 2010 Publication Date 2010-06-30 Imprint Logos Verlag Berlin GmbH Place of Publication Berlin Country of Publication Germany Publisher Logos Verlag Berlin GmbH Audience Professional & Vocational We've got this At The Nile, if you're looking for it, we've got it. With fast shipping, low prices, friendly service and well over a million items - you're bound to find what you want, at a price you'll love! TheNile_Item_ID:137244258;

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